|Instructor||Daniel D. Gajski|
|218, ICS Engineering Research Facility|
|Andreas Gerstlauer (Email: firstname.lastname@example.org)|
|Shuqing Zhao (Email: email@example.com)|
|Office/Lab Hours: Wed Fri 10-12, CS 364|
|Undergraduate Sun Lab. CS364.|
|Design Tool||Synopsys VHDL Compiler and Simulator|
|ICS 151 and ICS 152|
|VHDL: Analysis and Modeling of Digital Systems|
|Zainalabedin Navabi, McGraw-Hill, 1993|
| Principles of Digital Design
Daniel D. Gajski, Prentice Hall, 1997.
| Structured Logic Design with VHDL
Armstrong James, Gray Gail, Prentice Hall, 1993.
| VHDL: Hardware Description and Design
Roger Lipsett, Carl Schaefer, Cary Ussery
Kluwer Academic Publishers, 1989
The lab format may change a little through the quarter. However, you should plan or spending approximately 10 hours a week in the lab. You can often reduce the time spent in the lab by doing your designs before coming to the lab. If the lab gets crowded and students have trouble accessing the machines, we will use sign-up sheets for scheduling use of the lab.
The lectures serve primarily as a guide to the labs. Their primary objective is to discuss lab assignment and to review material. All announcements will be made at the beginning of the class. It is your responsibility to come to class and not to miss the announcements.
You will be required to demo your simulation run to the TA during the TA office/lab hours. The TA will run several test cases on your design, so make sure that you have tested your design completely before you are ready to demo it. Your grade will depend on the number of test cases that perform satisfactorily on your model. Your final grade will be based on your cumulative performance on the lab assignments and the final completion of the processor or ASIC.
Any students caught putting a program containing a virus on any computer will be subject to discipline as outlined for malicious conduct in the university regulations.
Theft of software from the systems is subject to course expulsion and possible criminal charges.
Organize your design as library directories, so that they can be used in later assignments.
Make sure that your design submissions have your name, ID#, the date written on them.
You may be required to give a demo of a completed lab assignments to the TA. In addition, most lab assignments require a short write-up. Details will be provided in the lab handouts.
Each students should read the bulletin board, ics.155b, for announcements etc. Students are responsible for reading this bulletin board as lab discussions, corrections and modifications will be posted there outside of class meetings.
|Lab #|| Handed out
| Lab Due on
|Lab 0||April 6||April 13|
|Lab 1||April 13||April 20|
|Lab 2||April 20||May 4|
|Lab 3||May 4||May 18|
|Lab 4||May 18||June 1|
|Lab 5||June 1||June 15|