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Please use this identifier to cite or link to this item: http://hdl.handle.net/10117/100

Title: High-Performance Computer Architecture and Algorithm Simulator
Authors: Hoganson, Kenneth
Keywords: Computer Systems Organization sub_subject: General Computer Systems Organization sub_subject: Processor Architectures Computer Systems Organization sub_subject: Computer-Communication Networks Computer Systems Organization sub_subject: Special-Purpose and Application-Based Systems Computer Systems Organization sub_subject: Performance of Systems Computer Systems Organization sub_subject: Computer System Implementation Software sub_subject: Programming Techniques Information Systems sub_subject: Information Storage and Retrieval Information Systems sub_subject: Information Systems Applications Computing Methodologies sub_subject: Simulation and Modeling,high-performance, parallel speedup, parallel architecture, pipeline, super-scalar, Amdahl, scaled-speedup, multiprocessor, multi-computer, distributed computing
Issue Date: 26-Oct-2001
Publisher: College of Science and Math, Kennesaw State University
Abstract: The dramatically increasing performance of computer systems is associated with an increase in hardware and system complexity, which has impacted computer science and engineering education. Formerly high-performance and advanced computer architecture techniques and technologies have migrated to our desktop computers, and consequently, into computer systems and architecture courses at the undergraduate and graduate levels. A new computer architecture simulation tool to enhance the teaching of architecture-related computer science and engineering courses is presented, which also can be used by researchers and engineers. This tool allows the simulation of computer architectures with user specified configurations, topologies, and interconnection networks, while running workloads whose characteristics are also under the control of the modeler. The simulator utilizes the recently published unified model of parallel processing and includes each of the five identified levels of parallelism. The simulator is a java applet, which can be used from a web browser, allowing anyone with an Internet connection access to the tool without concern about student licensing requirements.
URI: http://www.citidel.org/handle/10117/100
Other Identifiers: 175
Appears in Collections:Computer Science Teaching Center

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