Computing and Information Technology Interactive Digital Educational Library

 

CITIDEL >
Computer Science Teaching Center >
Computer Science Teaching Center >

Please use this identifier to cite or link to this item: http://hdl.handle.net/10117/113

Title: USING THE ALFA-1 SIMULATED PROCESSOR WITH EDUCATIONAL PURPOSES
Authors: Daicz, Sergio
Troccoli, Alejandro
Zlotnik, Sergio
Simoni, Luis De
Wasserman, Demian
Wainer, Gabriel
Keywords: Computer Systems Organization sub_subject: General Computing Methodologies sub_subject: Simulation and Modeling,B. Hardware. B.0 GENERAL
Issue Date: 9-Nov-2001
Abstract: Alfa-1 is a simulated computer designed to be used in Computer Architecture and Organization courses. The DEVS formalism was used to attack the complexity of the design, allowing the definition of individual components that were later integrated into a modelling hierarchy. The goal of the toolkit is to allow the students acquiring some practice building hardware components. Here, we present the design and implementation of the tools, focusing in how to use them and how to extend the existing components. We also explain how to assemble and link applications, how to execute them, and how to test new extensions based on a set of testing tools.
URI: http://www.citidel.org/handle/10117/113
Other Identifiers: 205
Appears in Collections:Computer Science Teaching Center

Files in This Item:

File Description SizeFormat
ALFA1-Distrib.zip26635KbUnknownView/Open
CoverLetter.PDF.description0KbUnknownView/Open
alfa1JERIC.PDF.description0KbUnknownView/Open
ALFA1-Distrib.zip.description0KbUnknownView/Open
abstract.txt0KbTextView/Open
dublin_core.xml2KbXMLView/Open
CoverLetter.PDF18KbAdobe PDFView/Open
alfa1JERIC.PDF683KbAdobe PDFView/Open
metadata.txt2KbTextView/Open

All items in DSpace are protected by copyright, with all rights reserved.

 

Valid XHTML 1.0! DSpace Software Copyright © 2002-2006 MIT and Hewlett-Packard - Feedback