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Title: Using the ALFA-1 Simulated Processor for Educational Purposes
Authors: Wasserman, Demin
Troccoli, Alejandro
Zlotnik, Sergio
Wainer, Gabriel
Daicz, Sergio
Simoni, Luis De
Keywords: Computer Systems Organization sub_subject: General Computing Methodologies sub_subject: Simulation and Modeling Computing Milieux sub_subject: Computers and Education,Modeling computer architectures, systems specification methodology, DEVS formalism
Issue Date: 7-Feb-2002
Abstract: Alfa-1 is a simulated computer designed for Computer Organization courses. Alfa-1 and its accompanying toolkit allow students to acquire practical insights into developing hardware by extending existing components. The DEVS formalism is used to model individual components and to integrate them into a hierarchy that de-scribes the detailed behavior of different levels of a computer's architecture. We introduce Alfa-1 and the tool-kit, show how to extend existing components, and describe how to use the Alfa-1 for educational purposes. We also explain how to assemble, link and execute applications, and how to test new extensions using the testing tools.
Other Identifiers: 232
Appears in Collections:Computer Science Teaching Center

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